? semiconductor components industries, llc, 2012 december, 2012 ? rev. 0 1 publication order number: ncv8408/d ncv8408 self-protected low side driver with temperature and current limit 42 v, 10 a, single n ? channel, dpak ncv8408 is a single channel protected low-side smart discrete device. the protection features in clude overcurrent, overtemperature, esd and integrated drain-to-gate clamping for overvoltage protection. thermal protection includes a latch which can be reset by toggling the input. this device is suitable for harsh automotive environments. features ? short circuit protection ? thermal shutdown with latched reset ? gate input current flag during latched fault condition ? overvoltage protection ? integrated clamp for inductive switching ? esd protection ? dv/dt robustness ? analog drive capability (logic level input) ? ncv prefix for automotive and other applications requiring unique site and control change requirements; aec ? q100 qualified and ppap capable ? these devices are pb ? free and are rohs compliant typical applications ? switch a variety of resistive, inductive and capacitive loads ? can replace electromechanical relays and discrete circuits ? automotive / industrial drain (2,4) source (3) temperature limit gate input (1) current limit current sense overvoltage protection esd protection http://onsemi.com v dss (clamped) r ds(on) typ i d max (limited) 42 v 55 m @ 5 v 10 a marking diagram y = year ww = work week v8408 = specific device code g = pb ? free package 1 2 3 4 dpak case 369c style 2 yww v8408g device package shipping ? ordering information ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specification brochure, brd8011/d. ncv8408dtrkg dpak (pb ? free) 2500/tape & reel source drain gate drain
ncv8408 http://onsemi.com 2 maximum ratings (t j = 25 c unless otherwise noted) rating symbol value unit drain ? to ? source voltage internally clamped v dss 42 vdc drain ? to ? gate voltage internally clamped (r gs = 1.0 m ) v dgr 42 v gate ? to ? source voltage v gs 14 vdc continuous drain current i d internally limited total power dissipation @ t a = 25 c (note 1) @ t a = 25 c (note 2) p d 1.8 2.3 w thermal resistance junction ? to ? ambient steady state (note 1) junction ? to ? ambient steady state (note 2) junction ? to ? tab steady state (note 3) r ja r ja r jt 70 55 2.1 c/w single pulse inductive load switching energy (v dd = 20 vdc, v gs = 5.0 v, i l = 8.0 a) e as 140 mj load dump voltage (v gs = 0 and 10 v, r i = 2.0 , r l = 4.5 , t d = 400 ms) v ld 63 v operating junction temperature t j ? 40 to 150 c storage temperature t stg ? 55 to 150 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. surface ? mounted onto minimum pad fr4 pcb (1 oz cu, 0.06? thick). 2. surface ? mounted onto 2 square fr4 pcb, (1 square, 1 oz cu, 0.06? thick). 3. surface ? mounted onto minimum pad fr4 pcb (2 oz cu, 0.06? thick). drain source gate vds vgs i d i g + ? + ? figure 1. voltage and current convention
ncv8408 http://onsemi.com 3 mosfet electrical characteristics (t j = 25 c unless otherwise noted) characteristic test conditions symbol min typ max unit off characteristics drain ? to ? source clamped breakdown voltage (note 4) (v gs = 0 v, i d = 10 ma, t j = 25 c) (v gs = 0 v, i d = 10 ma, t j = 150 c) (note 6) (v gs = 0 v, i d = 10 ma, t j = ? 40 c) (note 6) v (br)dss 42 40 43 46 45 47 51 51 51 v zero gate voltage drain current (v gs = 0 v, v ds = 32 v, t j = 25 c) (v gs = 0 v, v ds = 32 v, t j = 150 c) (note 6) i dss ? ? 0.6 2.5 5.0 10 a input characteristics (note 4) gate input current ? normal operation (v gs = 5.0 v) i gssf ? 25 50 a gate input current ? protection latched (v gs = 5.0 v) (note 6) i gssl ? 440 ? a gate threshold voltage (v gs = v ds , i d = 1 ma) v gs(th) 1.0 1.7 2.2 v gate threshold temperature coefficient v gs(th) /t j ? 5.0 ? ? mv/ c latched reset voltage (note 6) v lr 0.8 1.4 1.9 v latched reset time (v gs = 5.0 v to v gs < 1 v) (note 6) t lr 10 40 100 s internal gate input resistance ? 25.5 ? k on characteristics (note 4) static drain ? to ? source on ? resistance (v gs = 5.0 v, i d = 3.0 a, t j @ 25 c) (v gs = 5.0 v, i d = 3.0 a, t j @ 150 c) (note 6) r ds(on) ? ? 55 100 60 120 m source ? drain forward on voltage (v gs = 0 v, i s = 7.0 a) v sd ? 0.95 ? v switching characteristics (note 6) turn ? on delay time v gs = 5 v, v ds = 13 v r l = 4 , ? 40 c < t j < 150 c t d(on) 10 20 s s rise time (10% i d to 90% i d ) t r 20 40 turn ? off delay time t d(off) 30 60 fall time (90% i d to 10% i d ) t f 20 40 slew ? rate on (90% v d to 10% v d ) ? dv ds /dt on 0.5 v s slew ? rate off (10% v d to 90% v d ) dv ds /dt off 0.5 self protection characteristics (t j = 25 c unless otherwise noted) (note 5) current limit v gs = 5.0 v, v ds = 10 v, t j @ 25 c v gs = 5.0 v, v ds = 10 v, t j = 150 c (note 6) v gs = 5.0 v, v ds = 10 v, t j = ? 40 c (note 6) i lim 8 8 8 13 ? ? 16 18 16 a temperature limit (turn ? off) v gs = 5.0 v v gs = 10 v t lim(off) 150 150 175 165 200 185 c esd electrical characteristics (t j = 25 c unless otherwise noted) electro ? static discharge capability human body model (hbm) esd 4000 ? ? v electro ? static discharge capability machine model (mm) esd 400 ? ? v 4. pulse test: pulse width = 300 s, duty cycle = 2%. 5. fault conditions are viewed as beyond the normal operating range of the part. 6. not subject to production testing.
ncv8408 http://onsemi.com 4 test circuits and waveforms 5 v g d s rl vdd vin figure 2. resistive load switching test circuit + ? 4 i d 13 v 0 v td(on) tr vin id td(off) tf 10% 10% 90% 90% figure 3. resistive load switching waveforms 90% 10% vds
ncv8408 http://onsemi.com 5 test circuits and waveforms vdd ids vin l vds tp figure 4. inductive load switching test circuit dut g d s rg + ? 0 v 5 v t av vin ids vds t p v ds(on) i pk 0 vdd v (br)dss figure 5. inductive load switching waveforms
ncv8408 http://onsemi.com 6 typical characteristics figure 6. current limit vs. gate voltage figure 7. drain current vs. drain voltage v gs (v) v ds (v) 10 7 6 5 0 2 6 8 10 14 16 18 20 15 10 5 0 0 2 6 8 12 14 18 20 figure 8. r ds(on) vs. gate voltage figure 9. resistive switching v gs (v) v gs (v) 10 9 8 7 6 5 4 3 0 20 40 60 80 120 140 160 9 8 7 6 5 4 3 2 0 20 40 60 80 100 120 i lim (a) i d (a) r ds(on) (m ) time ( s) 4 12 25 c ? 40 c 125 c 150 c 4 10 16 v gs = 2.5 v 3 v 4 v 5 v 6 v 8 v 9 v 10 v 2 100 10 t d(on) t d(off) t r t f ? 40 c i d = 3 a i d = 8 a 25 c 100 c 150 c 7 v 89
ncv8408 http://onsemi.com 7 package dimensions dpak (single gauge) case 369c issue d b d e b3 l3 l4 b2 e m 0.005 (0.13) c c2 a c c z dim min max min max millimeters inches d 0.235 0.245 5.97 6.22 e 0.250 0.265 6.35 6.73 a 0.086 0.094 2.18 2.38 b 0.025 0.035 0.63 0.89 c2 0.018 0.024 0.46 0.61 b2 0.030 0.045 0.76 1.14 c 0.018 0.024 0.46 0.61 e 0.090 bsc 2.29 bsc b3 0.180 0.215 4.57 5.46 l4 ??? 0.040 ??? 1.01 l 0.055 0.070 1.40 1.78 l3 0.035 0.050 0.89 1.27 z 0.155 ??? 3.93 ??? notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: inches. 3. thermal pad contour optional within di- mensions b3, l3 and z. 4. dimensions d and e do not include mold flash, protrusions, or burrs. mold flash, protrusions, or gate burrs shall not exceed 0.006 inches per side. 5. dimensions d and e are determined at the outermost extremes of the plastic body. 6. datums a and b are determined at datum plane h. 12 3 4 5.80 0.228 2.58 0.102 1.60 0.063 6.20 0.244 3.00 0.118 6.17 0.243 mm inches scale 3:1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* h 0.370 0.410 9.40 10.41 a1 0.000 0.005 0.00 0.13 l1 0.108 ref 2.74 ref l2 0.020 bsc 0.51 bsc a1 h detail a seating plane a b c l1 l h l2 gauge plane detail a rotated 90 cw style 2: pin 1. gate 2. drain 3. source 4. drain on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other intellectual property. a list ing of scillc?s product/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent ? marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parame ters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 ncv8408/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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